ECAD Designer (IC layout for ASIC)
Length of Contract:
6 months hard stop for now.Hours:
40 hours per weekLocation:
Chandler, AZ (On-site) no exceptionsFeedback Time:
24 to 48 hoursOxford s client has 2 projects going on at the same time; the manager doesn't have enough people on his team to handle both projects. The manager is looking for an ECAD Designer who can help with the backend layout design of an ASIC; this is all pre-silicon. The manager needs the consultant to be familiar with either cadence virtuoso or cadence virtuoso XL and EDA Tools for design. They are working with the TSMC processes so it would be helpful for the consultant to know, but if they know Samsung process technologies that will work as well. It's 3nm FinFet Nodes. EDA tools the manager wants to see:
For CAD - Cadence Virtuoso suite , Calibre, spectre For Verilog - VCS/modelsim, verdi, Conformal LEC (or equivalent) Other tools that are a plus - hspice, siliconsmart/primelib, liberate, icc/innovus ECAD Designer (IC layout for ASIC) Apply to this job. Think you're the perfect candidate? Apply on company site $('.external-apply-email-saved').on('click', function (event) window.ExternalApply = window.open('/interstitial?jobdid=j3s5276p7056v8xrhq7', 'ExternalApply-j3s5276p7056v8xrhq7'); ); $(document).ready( function() $(#ads-desktop-placeholder).html(
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n Estimated Salary: $20 to $28 per hour based on qualifications.
6 months hard stop for now.Hours:
40 hours per weekLocation:
Chandler, AZ (On-site) no exceptionsFeedback Time:
24 to 48 hoursOxford s client has 2 projects going on at the same time; the manager doesn't have enough people on his team to handle both projects. The manager is looking for an ECAD Designer who can help with the backend layout design of an ASIC; this is all pre-silicon. The manager needs the consultant to be familiar with either cadence virtuoso or cadence virtuoso XL and EDA Tools for design. They are working with the TSMC processes so it would be helpful for the consultant to know, but if they know Samsung process technologies that will work as well. It's 3nm FinFet Nodes. EDA tools the manager wants to see:
For CAD - Cadence Virtuoso suite , Calibre, spectre For Verilog - VCS/modelsim, verdi, Conformal LEC (or equivalent) Other tools that are a plus - hspice, siliconsmart/primelib, liberate, icc/innovus ECAD Designer (IC layout for ASIC) Apply to this job. Think you're the perfect candidate? Apply on company site $('.external-apply-email-saved').on('click', function (event) window.ExternalApply = window.open('/interstitial?jobdid=j3s5276p7056v8xrhq7', 'ExternalApply-j3s5276p7056v8xrhq7'); ); $(document).ready( function() $(#ads-desktop-placeholder).html(
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n Estimated Salary: $20 to $28 per hour based on qualifications.
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